cmlt5087em surface mount silicon dual, matched pnp transistor description: the central semiconductor cmlt5087em consists of two individual, isolated 5087e pnp silicon transistors with matched v be(on) characteristics. this device is designed for applications requiring high gain and low noise. marking code: l87 sot-563 case maximum ratings: (t a =25c) symbol units collector-base voltage v cbo 50 v collector-emitter voltage v ceo 50 v emitter-base voltage v ebo 5.0 v continuous collector current i c 100 ma power dissipation p d 350 mw operating and storage junction temperature t j , t stg -65 to +150 c thermal resistance ja 357 c/w electrical characteristics per transistor: (t a =25c unless otherwise noted) symbol test conditions min typ max units i cbo v cb =20v 50 na i ebo v eb =3.0v 50 na bv cbo i c =100a 50 150 v bv ceo i c =1.0ma 50 105 v bv ebo i e =100a 5.0 7.5 v v ce(sat) i c =10ma, i b =1.0ma 50 100 mv v ce(sat) i c =100ma, i b =10ma 225 400 mv v be(sat) i c =10ma, i b =1.0ma 700 800 mv h fe v ce =5.0v, i c =0.1ma 300 390 900 h fe v ce =5.0v, i c =1.0ma 300 380 h fe v ce =5.0v, i c =10ma 300 350 h fe v ce =5.0v, i c =100ma 50 75 f t v ce =5.0v, i c =500a, f=20mhz 100 mhz c ob v cb =5.0v, i e =0, f=1.0mhz 4.0 pf c ib v be =0.5v, i c =0, f=1.0mhz 15 pf h fe v ce =5.0v, i c =1.0ma, f=1.0khz 350 1400 nf v ce =5.0v, i c =100a, r s =10k f=10hz to 15.7khz 3.0 db matching characteristics: symbol test conditions min max units | v be1 -v be2 | v ce =5.0v, i c =1.0a 10 mv | v be1 -v be2 | v ce =5.0v, i c =5.0a 10 mv | v be1 -v be2 | v ce =5.0v, i c =10a 10 mv | v be1 -v be2 | v ce =5.0v, i c =100a 10 mv features: ? transistor pair matched for v be(on) ? device is halogen free by design r3 (18-june 2015) www.centralsemi.com
cmlt5087em surface mount silicon dual, matched pnp transistor sot-563 case - mechanical outline lead code: 1) emitter q1 2) base q1 3) collector q2 4) emitter q2 5) base q2 6) collector q1 marking code: l87 pin configuration www.centralsemi.com r3 (18-june 2015)
cmlt5087em surface mount silicon dual, matched pnp transistor services ? bonded inventory ? custom electrical screening ? custom electrical characteristic curves ? spice models ? custom packaging ? package base options ? custom device development / multi discrete modules (mdm?) ? bare die available for hybrid applications limitations and damages disclaimer: in no event shall central be liable for any collateral, indirect, punitive, incidental, consequential, or exemplary damages in connection with or arising out of a purchase order or contract or the use of products provided hereunder, regardless of whether central has been advised of the possibility of such damages. excluded damages shall include, but not be restricted to: cost of removal or reinstallation, rework, ancillary costs to the procurement of substitute products, loss of profits, loss of savings, loss of use, loss of data, or business interruption. no claim, suit, or action shall be brought against central more than two (2) years after the related cause of action has occurred. in no event shall centrals aggregate liability from any warranty, indemnity, or other obligation arising out of or in connection with a purchase order or contract, or any use of any central product provided hereunder, exceed the total amount paid to central for the specific products sold under a purchase order or contract with respect to which losses or damages are claimed. the existence of more than one (1) claim against the specific products sold to buyer under a purchase order or contract shall not enlarge or extend this limit. buyer understands and agrees that the foregoing liability limitations are essential elements of a purchase order or contract and that in the absence of such limitations, the material and economic terms of the purchase order or contract would be substantially different. www.centralsemi.com r3 (18-june 2015)
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